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What is Stub Series Terminated Logic mean?
Stub Series Terminated Logic (SSTL) is a group of electrical standards for driving transmission lines commonly used with DRAM based DDR memory IC's and memory modules. SSTL is primarily designed for driving the DDR (double-data-rate) SDRAM modules used in computer memory; however, it is also used in other applications, notably some PCI Express PHYs and other high-speed devices.
Four voltage levels for SSTL are defined:
SSTL_3, 3.3 V, defined in EIA/JESD8-8 1996SSTL_2, 2.5 V, defined in EIA/JESD8-9B 2002 used in DDR among other things.SSTL_18, 1.8 V, defined in EIA/JESD8-15A, used in DDR2 among other things.SSTL_15, 1.5 V, Used in DDR3 among other things.SSTL_3 uses a reference of .45*VDDQ(1.5V). SSTL_2 and SSTL_18 reference a voltage that is exactly VDDQ/2(1.25V and .9V respectively).
SSTL_3 and SSTL_2 support two termination classes (50 ohm or 25 ohm load). SSTL_18 only supports one (25 ohm load).
referencePosted on 31 Dec 2024, this text provides information on Miscellaneous in Computing related to Computing. Please note that while accuracy is prioritized, the data presented might not be entirely correct or up-to-date. This information is offered for general knowledge and informational purposes only, and should not be considered as a substitute for professional advice.
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